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查看Hikey960 device tree的源代码
Hikey960 device tree
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hi3660-hikey960.dts 1.hi3660.dtsi <source lang="python"> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/hi3660-clock.h> #include <dt-bindings/thermal/thermal.h> /{ psci {} cpus { cpu_map { cluster0 { core0 { cpu=&cpu0 } core1 { cpu=&cpu1 } core2 { cpu=&cpu2 } core3 { cpu=&cpu3 } } cluster1 { core0 { cpu=&cpu4 } core1 { cpu=&cpu5 } core2 { cpu=&cpu6 } core3 { cpu=&cpu7 } } } }//cpus cpu0: cpu@0 {} cpu1: cpu@1 {} cpu2: cpu@2 {} cpu3: cpu@3 {} cpu4: cpu@100 {} cpu5: cpu@101 {} cpu6: cpu@102 {} cpu7: cpu@103 {} idle-states{} l2-cache0 {} l2-cache1 {} opp_table0 {} opp_table1 () gic: interrupt-controller@e82b0000 {} pmu {} timer {} framebuffer@E8600000 {} panel_lcd_hikey {} soc { crg_ctrl: crg_ctrl@fff35000 crg_rst: crg_rst_controller pctrl: pctrl@e8a09000 pmctrl: pmctrl@fff31000 pmuctrl: crg_ctrl@fff34000 sctrl: sctrl@fff0a000 iomcu: iomcu@ffd7e000 iomcu_rst: reset mailbox: mailbox@e896b000 stub_clock: stub_clock dual_timer0: timer@fff14000 i2c0: i2c@ffd71000 i2c1: i2c@ffd72000 {}; pd_dpm {}; hubv2: gpio_hubv2 {} i2c3: i2c@fdf0c000 {}; i2c7: i2c@fdf0b000 {}; uart0: serial@fdf02000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf02000 0x0 0x1000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>, <&crg_ctrl HI3660_PCLK>; clock-names = "uartclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>; status = "disabled"; }; uart1: serial@fdf00000 {} uart2: serial@fdf00000 {} uart3: serial@fdf00000 {} uart4: serial@fdf00000 {} uart5: serial@fdf00000 {} uart6: serial@fdf00000 {} dma0: dma@fdf30000 { }; rtc0: rtc@fff04000 {}; gpio0: gpio@e8a0b000 {}; gpio1: gpio@e8a0c000 {} gpio2: gpio@e8a0d000 { gpio3: gpio@e8a0e000 { .... gpio27: gpio@e8a10000 { gpio28: gpio@e8a11000 { spi2: spi@ffd68000 { spi3: spi@ff3b3000 { pcie@f4000000 { dwmmc1: dwmmc1@ff37f000 { /* SD */ dwmmc2: dwmmc2@ff3ff000 { /* SDIO */ watchdog0: watchdog@e8a06000 { watchdog1: watchdog@e8a07000 { tsensor: tsensor { }; ufs: ufs@ff3b0000 { }; hub5734_gpio:hub5734_gpio { tsensor: tsensor { ufs: ufs@ff3b0000 { hub5734_gpio:hub5734_gpio { hisi_usb@ff200000 { thermal-zones { cls0: cls0 { trips { threshold: trip-point@0 {}; target: trip-point@1 {}; }; cooling-maps { map0 {}; map1 {}; }; }; };// thermal-zones } } </source> 2."hikey960-pinctrl.dtsi" <source lang="python"> #include <dt-bindings/pinctrl/hisi.h> soc { range: gpio-range { }; pmx0: pinmux@e896c000 { pmu_pmx_func: pmu_pmx_func { }; csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func {}; csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func {}; isp0_pmx_func: isp0_pmx_func {}; isp1_pmx_func: isp1_pmx_func {}; pwr_key_pmx_func: pwr_key_pmx_func {} i2c3_pmx_func: i2c3_pmx_func {}; i2c4_pmx_func: i2c4_pmx_func { pcie_perstn_pmx_func: pcie_perstn_pmx_func { usbhub5734_pmx_func: usbhub5734_pmx_func { uart0_pmx_func: uart0_pmx_func { uart1_pmx_func: uart1_pmx_func { uart2_pmx_func: uart2_pmx_func { uart3_pmx_func: uart3_pmx_func { uart4_pmx_func: uart4_pmx_func { uart5_pmx_func: uart5_pmx_func { uart6_pmx_func: uart6_pmx_func { cam0_rst_pmx_func: cam0_rst_pmx_func { cam1_rst_pmx_func: cam1_rst_pmx_func {} }//pmx0 pmx1: pinmux@ff37e000 { sd_pmx_func: sd_pmx_func {} }; pmx2: pinmux@ff3b6000 { ufs_pmx_func: u spi3_pmx_func: spi3_pmx_func {}; }; /* [IOMG_MMC1_000, IOMG_MMC1_005] */ pmx3: pinmux@ff3fd000 { sdio_pmx_func: sdio_pmx_func { }; }; /* [IOMG_AO_000, IOMG_AO_041] */ pmx4: pinmux@fff11000 { i2s2_pmx_func: i2s2_pmx_func { slimbus_pmx_func: slimbus_pmx_func { i2c0_pmx_func: i2c0_pmx_func { i2c1_pmx_func: i2c1_pmx_func { i2c7_pmx_func: i2c7_pmx_func { pcie_pmx_func: pcie_pmx_func { spi2_pmx_func: spi2_pmx_func { i2s0_pmx_func: i2s0_pmx_func { } pmx5: pinmux@e896c800 { pmu_cfg_func: pmu_cfg_func { i2c3_cfg_func: i2c3_cfg_func { csi0_pwd_n_cfg_func: csi0_pwd_n_cfg_func { csi1_pwd_n_cfg_func: csi1_pwd_n_cfg_func { isp0_cfg_func: isp0_cfg_func { isp1_cfg_func: isp1_cfg_func { pwr_key_cfg_func: pwr_key_cfg_func { uart1_cfg_func: uart1_cfg_func { uart2_cfg_func: uart2_cfg_func { uart5_cfg_func: uart5_cfg_func { cam0_rst_cfg_func: cam0_rst_cfg_func { uart0_cfg_func: uart0_cfg_func { uart6_cfg_func: uart6_cfg_func {} } pmx6: pinmux@ff3b6800 { ufs_cfg_func: ufs_cfg_func {}; spi3_cfg_func: spi3_cfg_func {} } pmx7: pinmux@ff3fd800 { sdio_clk_cfg_func: sdio_clk_cfg_func { sdio_cfg_func: sdio_cfg_func {} }; pmx8: pinmux@ff37e800 { sd_clk_cfg_func: sd_clk_cfg_func {}; sd_cfg_func: sd_cfg_func { }; pmx9: pinmux@fff11800 { i2c0_cfg_func: i2c0_cfg_func { i2c1_cfg_func: i2c1_cfg_func { i2c7_cfg_func: i2c7_cfg_func { slimbus_cfg_func: slimbus_cfg_func { i2s0_cfg_func: i2s0_cfg_func { i2s2_cfg_func: i2s2_cfg_func { pcie_cfg_func: pcie_cfg_func { spi2_cfg_func: spi2_cfg_func { usb_cfg_func: usb_cfg_func {} } } </source> 3."hi3660-gpu.dtsi" <source lang="c"> /{ gpu: mali@E82C0000 { compatible = "arm,malit6xx", "arm,mali-midgard"; }; }; </source> 4."hi3660-drm.dtsi" <source lang="c"> /{ dpe: dpe@E8600000 { compatible = "hisilicon,hi3660-dpe"; port { dpe_out: endpoint { }; }; iommu_info { }; }; dsi: dsi@E8601000 { compatible = "hisilicon,hi3660-dsi"; ports { port@0 {}; port@1 {}; }; panel@1 { compatible = "hisilicon,mipi-hikey"; port { panel0_in: endpoint {}; }; }; }; }; </source> 5."hi3660-coresight.dtsi" <source lang="c"> / { amba { /* A53 cluster internal coresight */ etm@0,ecc40000 { port { etm0_out_port: endpoint {}; }; }; etm@1,ecd40000 { port { etm1_out_port: endpoint {}; }; }; etm@2,ece40000 { port { etm2_out_port: endpoint { }; }; }; etm@3,ecf40000 { port { etm3_out_port: endpoint {}; }; }; funnel0:funnel@0,ec801000 { ports { port@0 { funnel0_out_port: endpoint { }; }; /* funnel input ports */ port@1 { funnel0_in_port0: endpoint { }; }; port@2 { funnel0_in_port1: endpoint { }; }; port@3 { funnel0_in_port2: endpoint { }; }; port@4 { funnel0_in_port3: endpoint { }; }; }; }; etf0:etf@0,ec802000 { ports { port@0 { etf0_in_port: endpoint { }; }; /* output port */ port@1 { etf0_out_port: endpoint { }; }; }; }; /* A73 cluster internal coresight */ etm@4,ed440000 { port { etm4_out_port: endpoint { }; }; }; etm@5,ed540000 { port { etm5_out_port: endpoint { }; }; }; etm@6,ed640000 { port { etm6_out_port: endpoint { }; }; }; etm@7,ed740000 { cpu = <&cpu7>; port { etm7_out_port: endpoint { }; }; }; funnel1:funnel@1,ed001000 { ports { port@0 { funnel1_out_port: endpoint { }; }; port@1 { funnel1_in_port0: endpoint { }; }; port@2 { funnel1_in_port1: endpoint { }; }; port@3 { funnel1_in_port2: endpoint { }; }; port@4 { funnel1_in_port3: endpoint { }; }; }; }; etf1:etf@1,ed002000 { ports { port@0 { etf1_in_port: endpoint { }; }; /* output port */ port@1 { etf1_out_port: endpoint { }; }; }; }; /* Top coresight config */ funnel@2,ec031000 { ports { port@0 { funnel2_out_port: endpoint { }; }; port@1 { funnel2_in_port0: endpoint { }; }; }; }; etf@2,ec036000 { ports { port@0 { etf2_in_port: endpoint { }; }; /* output port */ port@1 { etf2_out_port: endpoint { }; }; }; }; replicator { ports { port@0 { replicator0_out_port0: endpoint { }; }; port@1 { replicator0_out_port1: endpoint { }; }; port@2 { replicator0_in_port: endpoint { }; }; }; }; etr@0,ec033000 { ports { port@0 { etr_in_port: endpoint { }; }; }; }; tpiu@ec032000 { compatible = "arm,coresight-tpiu", "arm,primecell"; port { tpiu_in_port: endpoint { }; }; }; }; }; </source> 6. <source lang="c"> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> / { model = "HiKey960"; aliases { mshc1 = &dwmmc1; //"/soc/dwmmc1@ff37f000"; mshc2 = &dwmmc2; //"/soc/dwmmc2@ff3ff000"; serial0 = &uart0;//"/soc/serial@fdf02000"; serial1 = &uart1;//"/soc/serial@fdf00000"; serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; serial6 = &uart6;//"/soc/serial@fff32000"; }; chosen { stdout-path = "serial6:115200n8"; }; memory@0 { device_type = "memory"; /* rewrite this at bootloader */ reg = <0x0 0x0 0x0 0x0>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; ramoops@32000000 { compatible = "ramoops"; reg = <0x0 0x32000000 0x0 0x00100000>; record-size = <0x00020000>; console-size = <0x00020000>; ftrace-size = <0x00020000>; }; }; reboot-mode-syscon@32100000 { compatible = "syscon", "simple-mfd"; reg = <0x0 0x32100000 0x0 0x00001000>; reboot-mode { compatible = "syscon-reboot-mode"; offset = <0x0>; mode-normal = <0x77665501>; mode-bootloader = <0x77665500>; mode-recovery = <0x77665502>; }; }; pclk: apb_pclk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <20000000>; clock-output-names = "apb_pclk"; }; keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>;//<0x74 0x75>; power { wakeup-source; gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;//<0x25 0x2 0x1>; label = "GPIO Power"; linux,code = <KEY_POWER>; }; }; leds { compatible = "gpio-leds"; user_led1 { label = "user_led1"; /* gpio_150_user_led1 */ gpios = <&gpio18 6 0>; // <0x42 0x6 0x0>; linux,default-trigger = "heartbeat"; }; user_led2 { label = "user_led2"; /* gpio_151_user_led2 */ gpios = <&gpio18 7 0>; //<0x42 0x7 0x0>; linux,default-trigger = "mmc0"; }; user_led3 { label = "user_led3"; /* gpio_189_user_led3 */ gpios = <&gpio23 5 0>; //<0x76 0x5 0x0>; default-state = "off"; }; user_led4 { label = "user_led4"; /* gpio_190_user_led4 */ gpios = <&gpio23 6 0>; linux,default-trigger = "cpu0"; }; wlan_active_led { label = "wifi_active"; /* gpio_205_wifi_active */ gpios = <&gpio25 5 0>; //<0x24 0x5 0x0>; linux,default-trigger = "phy0tx"; default-state = "off"; }; bt_active_led { label = "bt_active"; gpios = <&gpio25 7 0>; /* gpio_207_user_led1 */ linux,default-trigger = "hci0-power"; default-state = "off"; }; }; pmic: pmic@fff34000 { compatible = "hisilicon,hi6421v530-pmic"; reg = <0x0 0xfff34000 0x0 0x1000>; interrupt-controller; #interrupt-cells = <2>; regulators { ldo3: LDO3 { /* HDMI */ regulator-name = "VOUT3_1V85"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2200000>; regulator-enable-ramp-delay = <120>; }; ldo9: LDO9 { /* SDCARD I/O */ regulator-name = "VOUT9_1V8_2V95"; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <3300000>; regulator-enable-ramp-delay = <240>; }; ldo11: LDO11 { /* Low Speed Connector */ regulator-name = "VOUT11_1V8_2V95"; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <3300000>; regulator-enable-ramp-delay = <240>; }; ldo15: LDO15 { /* UFS VCC */ regulator-name = "VOUT15_3V0"; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <3000000>; regulator-boot-on; regulator-always-on; regulator-enable-ramp-delay = <120>; }; ldo16: LDO16 { /* SD VDD */ regulator-name = "VOUT16_2V95"; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <3000000>; regulator-enable-ramp-delay = <360>; }; }; }; wlan_en: wlan-en-1-8v { compatible = "regulator-fixed"; regulator-name = "wlan-en-regulator"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; /* GPIO_051_WIFI_EN */ gpio = <&gpio6 3 0>; //<0x77 0x3 0x0>; /* WLAN card specific delay */ startup-delay-us = <70000>; enable-active-high; }; firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; }; &i2c0 { //i2c@ffd71000 /* On Low speed expansion */ label = "LS-I2C0"; status = "okay"; }; &i2c1 { //i2c@ffd72000 status = "okay"; adv7533: adv7533@39 { status = "ok"; compatible = "adi,adv7533"; reg = <0x39>; }; }; &i2c7 { /* On Low speed expansion */ label = "LS-I2C1"; status = "okay"; }; &uart3 { /* On Low speed expansion */ label = "LS-UART0"; status = "okay"; }; &uart4 { status = "okay"; bluetooth { compatible = "ti,wl1837-st"; enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>; max-speed = <3000000>; }; }; &uart6 { /* On Low speed expansion */ label = "LS-UART1"; status = "okay"; }; &spi2 { /* On Low speed expansion */ label = "LS-SPI0"; status = "okay"; }; &spi3 { /* On High speed expansion */ label = "HS-SPI1"; status = "okay"; }; &dwmmc1 { vmmc-supply = <&ldo16>; vqmmc-supply = <&ldo9>; status = "okay"; }; &dwmmc2 { /* WIFI */ broken-cd; /* WL_EN */ vmmc-supply = <&wlan_en>; ti,non-removable; non-removable; #address-cells = <0x1>; #size-cells = <0x0>; status = "ok"; wlcore: wlcore@2 { compatible = "ti,wl1837"; reg = <2>; /* sdio func num */ /* WL_IRQ, GPIO_179_WL_WAKEUP_AP */ interrupt-parent = <&gpio22>; interrupts = <3 IRQ_TYPE_EDGE_RISING>; }; }; &ufs { ufs-hi3660-use-rate-B; ufs-hi3660-broken-fastauto; ufs-hi3660-use-HS-GEAR3; ufs-hi3660-broken-clk-gate-bypass; reset-gpio = <&gpio18 1 0>; status = "okay"; }; </source> Consolidate: uart0 <source lang="c"> serial@ffd74000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xffd74000 0x0 0x1000>; interrupts = <0x0 0x72 0x4>; clocks = <0x13 0xf 0x13 0x8>; clock-names = "uartclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <0x32 0x33>; status = "okay"; label = "LS-UART0"; }; serial@fff32000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfff32000 0x0 0x1000>; interrupts = <0x0 0x4f 0x4>; clocks = <0x13 0xa 0x13 0x8>; clock-names = "uartclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <0x39 0x3a>; status = "okay"; label = "LS-UART1"; }; </source>
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