“Hikey960 device tree”的版本间的差异

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</source>
 
</source>
 
5."hi3660-coresight.dtsi"
 
5."hi3660-coresight.dtsi"
 +
<source lang="c">
 +
/ {
 +
amba {
 +
/* A53 cluster internal coresight */
 +
etm@0,ecc40000 {
 +
port {
 +
etm0_out_port: endpoint {};
 +
};
 +
};
 +
etm@1,ecd40000 {
 +
port {
 +
etm1_out_port: endpoint {};
 +
};
 +
};
 +
etm@2,ece40000 {
 +
port {
 +
etm2_out_port: endpoint {
 +
};
 +
};
 +
};
 +
 +
etm@3,ecf40000 {
 +
port {
 +
etm3_out_port: endpoint {};
 +
};
 +
};
 +
 +
funnel0:funnel@0,ec801000 {
 +
ports {
 +
port@0 {
 +
funnel0_out_port: endpoint {
 +
};
 +
};
 +
 +
/* funnel input ports */
 +
port@1 {
 +
funnel0_in_port0: endpoint {
 +
};
 +
};
 +
 +
port@2 {
 +
funnel0_in_port1: endpoint {
 +
};
 +
};
 +
 +
port@3 {
 +
funnel0_in_port2: endpoint {
 +
};
 +
};
 +
port@4 {
 +
funnel0_in_port3: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
etf0:etf@0,ec802000 {
 +
ports {
 +
port@0 {
 +
etf0_in_port: endpoint {
 +
};
 +
};
 +
 +
/* output port */
 +
port@1 {
 +
etf0_out_port: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
/* A73 cluster internal coresight */
 +
etm@4,ed440000 {
 +
port {
 +
etm4_out_port: endpoint {
 +
};
 +
};
 +
};
 +
 +
etm@5,ed540000 {
 +
port {
 +
etm5_out_port: endpoint {
 +
};
 +
};
 +
};
 +
 +
etm@6,ed640000 {
 +
port {
 +
etm6_out_port: endpoint {
 +
};
 +
};
 +
};
 +
 +
etm@7,ed740000 {
 +
cpu = <&cpu7>;
 +
port {
 +
etm7_out_port: endpoint {
 +
};
 +
};
 +
};
 +
 +
funnel1:funnel@1,ed001000 {
 +
ports {
 +
port@0 {
 +
funnel1_out_port: endpoint {
 +
};
 +
};
 +
port@1 {
 +
funnel1_in_port0: endpoint {
 +
};
 +
};
 +
 +
port@2 {
 +
funnel1_in_port1: endpoint {
 +
};
 +
};
 +
 +
port@3 {
 +
funnel1_in_port2: endpoint {
 +
};
 +
};
 +
 +
port@4 {
 +
funnel1_in_port3: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
etf1:etf@1,ed002000 {
 +
ports {
 +
port@0 {
 +
etf1_in_port: endpoint {
 +
};
 +
};
 +
 +
/* output port */
 +
port@1 {
 +
etf1_out_port: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
/* Top coresight config */
 +
funnel@2,ec031000 {
 +
 +
ports {
 +
port@0 {
 +
funnel2_out_port: endpoint {
 +
};
 +
};
 +
port@1 {
 +
funnel2_in_port0: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
etf@2,ec036000 {
 +
ports {
 +
port@0 {
 +
etf2_in_port: endpoint {
 +
};
 +
};
 +
 +
/* output port */
 +
port@1 {
 +
etf2_out_port: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
replicator {
 +
ports {
 +
port@0 {
 +
replicator0_out_port0: endpoint {
 +
};
 +
};
 +
port@1 {
 +
replicator0_out_port1: endpoint {
 +
};
 +
};
 +
port@2 {
 +
replicator0_in_port: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
etr@0,ec033000 {
 +
ports {
 +
port@0 {
 +
etr_in_port: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
 +
tpiu@ec032000 {
 +
compatible = "arm,coresight-tpiu", "arm,primecell";
 +
port {
 +
tpiu_in_port: endpoint {
 +
};
 +
};
 +
};
 +
};
 +
};
 +
</source>
 
6.
 
6.
 
<source lang="c">
 
<source lang="c">

2019年11月16日 (六) 17:14的版本

hi3660-hikey960.dts
1.hi3660.dtsi 

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/hi3660-clock.h>
#include <dt-bindings/thermal/thermal.h>
/{
    psci {}
    cpus {
        cpu_map {
            cluster0 {
                core0 { cpu=&cpu0 }
                core1 { cpu=&cpu1 }
                core2 { cpu=&cpu2 }
                core3 { cpu=&cpu3 }
            }
            cluster1 {
                core0 { cpu=&cpu4 }
                core1 { cpu=&cpu5 }
                core2 { cpu=&cpu6 }
                core3 { cpu=&cpu7 }
            }
        }
    }//cpus
    cpu0: cpu@0 {}
    cpu1: cpu@1 {}
    cpu2: cpu@2 {}
    cpu3: cpu@3 {}
    cpu4: cpu@100 {}
    cpu5: cpu@101 {}
    cpu6: cpu@102 {}
    cpu7: cpu@103 {}
    idle-states{}
    l2-cache0 {}
    l2-cache1 {}
    opp_table0 {}
    opp_table1 ()
    gic: interrupt-controller@e82b0000 {}
    pmu {}
    timer {}
    framebuffer@E8600000 {}
    panel_lcd_hikey {}
    soc {
 
                crg_ctrl: crg_ctrl@fff35000 
                crg_rst: crg_rst_controller 
                pctrl: pctrl@e8a09000 
                pmctrl: pmctrl@fff31000
                pmuctrl: crg_ctrl@fff34000 
                sctrl: sctrl@fff0a000 
                iomcu: iomcu@ffd7e000 
                iomcu_rst: reset
                mailbox: mailbox@e896b000 
                stub_clock: stub_clock 
                dual_timer0: timer@fff14000
                i2c0: i2c@ffd71000 
                i2c1: i2c@ffd72000 {};
                pd_dpm {};
                hubv2: gpio_hubv2 {}
                i2c3: i2c@fdf0c000 {};
                i2c7: i2c@fdf0b000 {};
                uart0: serial@fdf02000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfdf02000 0x0 0x1000>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
                                 <&crg_ctrl HI3660_PCLK>;
                        clock-names = "uartclk", "apb_pclk";
                        pinctrl-names = "default";
                        pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
                        status = "disabled";
                };
 
                uart1: serial@fdf00000 {}
                uart2: serial@fdf00000 {}
                uart3: serial@fdf00000 {}
                uart4: serial@fdf00000 {}
                uart5: serial@fdf00000 {}
                uart6: serial@fdf00000 {}
                dma0: dma@fdf30000 { };
                rtc0: rtc@fff04000 {};
                gpio0: gpio@e8a0b000 {};
                gpio1: gpio@e8a0c000 {}
                gpio2: gpio@e8a0d000 {
                gpio3: gpio@e8a0e000 {
                ....
                gpio27: gpio@e8a10000 {
                gpio28: gpio@e8a11000 {
                spi2: spi@ffd68000 {
                spi3: spi@ff3b3000 {
                pcie@f4000000 {
                dwmmc1: dwmmc1@ff37f000 { /* SD */
                dwmmc2: dwmmc2@ff3ff000 { /* SDIO */
                watchdog0: watchdog@e8a06000 {
                watchdog1: watchdog@e8a07000 {
                tsensor: tsensor {            };
                ufs: ufs@ff3b0000 {             };
                hub5734_gpio:hub5734_gpio {
                tsensor: tsensor {
                ufs: ufs@ff3b0000 {
                hub5734_gpio:hub5734_gpio {
                hisi_usb@ff200000 {
                thermal-zones {
                        cls0: cls0 {
                                trips {
                                        threshold: trip-point@0 {};
                                        target: trip-point@1 {};
                                };
                                cooling-maps {
                                        map0 {};
                                        map1 {};
                                };
                        };
                };// thermal-zones 
 
 
    }
 
 }

2."hikey960-pinctrl.dtsi" 

#include <dt-bindings/pinctrl/hisi.h>
 
    soc {
               range: gpio-range { };
               pmx0: pinmux@e896c000 {
                      pmu_pmx_func: pmu_pmx_func {  };
                      csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func {};
                      csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func {};
                      isp0_pmx_func: isp0_pmx_func {};
                      isp1_pmx_func: isp1_pmx_func {};
                      pwr_key_pmx_func: pwr_key_pmx_func {}
                      i2c3_pmx_func: i2c3_pmx_func {};
                      i2c4_pmx_func: i2c4_pmx_func {
                      pcie_perstn_pmx_func: pcie_perstn_pmx_func {
                      usbhub5734_pmx_func: usbhub5734_pmx_func {
                      uart0_pmx_func: uart0_pmx_func {
                      uart1_pmx_func: uart1_pmx_func {
                      uart2_pmx_func: uart2_pmx_func {
                      uart3_pmx_func: uart3_pmx_func {
                      uart4_pmx_func: uart4_pmx_func {
                      uart5_pmx_func: uart5_pmx_func {
                      uart6_pmx_func: uart6_pmx_func {
                      cam0_rst_pmx_func: cam0_rst_pmx_func {
                      cam1_rst_pmx_func: cam1_rst_pmx_func {}
               }//pmx0
                pmx1: pinmux@ff37e000 {
                      sd_pmx_func: sd_pmx_func {}
                };
                pmx2: pinmux@ff3b6000 {
                      ufs_pmx_func: u
                      spi3_pmx_func: spi3_pmx_func {};
                };
 
                /* [IOMG_MMC1_000, IOMG_MMC1_005] */
                pmx3: pinmux@ff3fd000 {
                      sdio_pmx_func: sdio_pmx_func {   };
                };
 
                /* [IOMG_AO_000, IOMG_AO_041] */
                pmx4: pinmux@fff11000 {
                      i2s2_pmx_func: i2s2_pmx_func  {
                      slimbus_pmx_func: slimbus_pmx_func {
                      i2c0_pmx_func: i2c0_pmx_func {
                      i2c1_pmx_func: i2c1_pmx_func {
                      i2c7_pmx_func: i2c7_pmx_func {
                       pcie_pmx_func: pcie_pmx_func {
                       spi2_pmx_func: spi2_pmx_func {
                       i2s0_pmx_func: i2s0_pmx_func {
                }
                pmx5: pinmux@e896c800 {
                       pmu_cfg_func: pmu_cfg_func {
                       i2c3_cfg_func: i2c3_cfg_func {
                       csi0_pwd_n_cfg_func: csi0_pwd_n_cfg_func {
                       csi1_pwd_n_cfg_func: csi1_pwd_n_cfg_func {
                       isp0_cfg_func: isp0_cfg_func {
                       isp1_cfg_func: isp1_cfg_func {
                       pwr_key_cfg_func: pwr_key_cfg_func {
                       uart1_cfg_func: uart1_cfg_func {
                       uart2_cfg_func: uart2_cfg_func {
                       uart5_cfg_func: uart5_cfg_func {
                       cam0_rst_cfg_func: cam0_rst_cfg_func {
                       uart0_cfg_func: uart0_cfg_func {
                       uart6_cfg_func: uart6_cfg_func {}
                 }
                 pmx6: pinmux@ff3b6800 {
                        ufs_cfg_func: ufs_cfg_func {};
                        spi3_cfg_func: spi3_cfg_func {}
                 }
                 pmx7: pinmux@ff3fd800 {
                        sdio_clk_cfg_func: sdio_clk_cfg_func {
                        sdio_cfg_func: sdio_cfg_func {}
                 };
                 pmx8: pinmux@ff37e800 {
                        sd_clk_cfg_func: sd_clk_cfg_func {};
                        sd_cfg_func: sd_cfg_func {
                 };   
                 pmx9: pinmux@fff11800 {
                        i2c0_cfg_func: i2c0_cfg_func {
                        i2c1_cfg_func: i2c1_cfg_func {
                        i2c7_cfg_func: i2c7_cfg_func {
                        slimbus_cfg_func: slimbus_cfg_func {
                        i2s0_cfg_func: i2s0_cfg_func {
                        i2s2_cfg_func: i2s2_cfg_func {
                        pcie_cfg_func: pcie_cfg_func {
                        spi2_cfg_func: spi2_cfg_func {
                        usb_cfg_func: usb_cfg_func {}
                 } 
    }

3."hi3660-gpu.dtsi" 

/{
    gpu: mali@E82C0000 {
        compatible = "arm,malit6xx", "arm,mali-midgard";
    };
};

4."hi3660-drm.dtsi" 

/{
		dpe: dpe@E8600000 {
			compatible = "hisilicon,hi3660-dpe";
			port {
				dpe_out: endpoint {
				};
			};
			iommu_info {
			};
		};
		dsi: dsi@E8601000 {
			compatible = "hisilicon,hi3660-dsi";
			ports {
				port@0 {};
				port@1 {};
			};
			panel@1 {
				compatible = "hisilicon,mipi-hikey";
				port {
					panel0_in: endpoint {};
                                };
			};
		};
};

5."hi3660-coresight.dtsi" 

/ {
	amba {
		/* A53 cluster internal coresight */
		etm@0,ecc40000 {
			port {
				etm0_out_port: endpoint {};
			};
		};
		etm@1,ecd40000 {
			port {
				etm1_out_port: endpoint {};
			};
		};
		etm@2,ece40000 {
			port {
				etm2_out_port: endpoint {
				};
			};
		};
 
		etm@3,ecf40000 {
			port {
				etm3_out_port: endpoint {};
			};
		};
 
		funnel0:funnel@0,ec801000 {
			ports {
				port@0 {
					funnel0_out_port: endpoint {
					};
				};
 
				/* funnel input ports */
				port@1 {
					funnel0_in_port0: endpoint {
					};
				};
 
				port@2 {
					funnel0_in_port1: endpoint {
					};
				};
 
				port@3 {
					funnel0_in_port2: endpoint {
					};
				};
				port@4 {
					funnel0_in_port3: endpoint {
					};
				};
			};
		};
 
		etf0:etf@0,ec802000 {
			ports {
				port@0 {
					etf0_in_port: endpoint {
					};
				};
 
				/* output port */
				port@1 {
					etf0_out_port: endpoint {
					};
				};
			};
		};
 
		/* A73 cluster internal coresight */
		etm@4,ed440000 {
			port {
				etm4_out_port: endpoint {
				};
			};
		};
 
		etm@5,ed540000 {
			port {
				etm5_out_port: endpoint {
				};
			};
		};
 
		etm@6,ed640000 {
			port {
				etm6_out_port: endpoint {
				};
			};
		};
 
		etm@7,ed740000 {
			cpu = <&cpu7>;
			port {
				etm7_out_port: endpoint {
				};
			};
		};
 
		funnel1:funnel@1,ed001000 {
			ports {
				port@0 {
					funnel1_out_port: endpoint {
					};
				};
				port@1 {
					funnel1_in_port0: endpoint {
					};
				};
 
				port@2 {
					funnel1_in_port1: endpoint {
					};
				};
 
				port@3 {
					funnel1_in_port2: endpoint {
					};
				};
 
				port@4 {
					funnel1_in_port3: endpoint {
					};
				};
			};
		};
 
		etf1:etf@1,ed002000 {
			ports {
				port@0 {
					etf1_in_port: endpoint {
					};
				};
 
				/* output port */
				port@1 {
					etf1_out_port: endpoint {
					};
				};
			};
		};
 
		/* Top coresight config */
		funnel@2,ec031000 {
 
			ports {
				port@0 {
					funnel2_out_port: endpoint {
					};
				};
				port@1 {
					funnel2_in_port0: endpoint {
					};
				};
			};
		};
 
		etf@2,ec036000 {
			ports {
				port@0 {
					etf2_in_port: endpoint {
					};
				};
 
				/* output port */
				port@1 {
					etf2_out_port: endpoint {
					};
				};
			};
		};
 
		replicator {
			ports {
				port@0 {
					replicator0_out_port0: endpoint {
					};
				};
				port@1 {
					replicator0_out_port1: endpoint {
					};
				};
				port@2 {
					replicator0_in_port: endpoint {
					};
				};
			};
		};
 
		etr@0,ec033000 {
			ports {
				port@0 {
					etr_in_port: endpoint {
					};
				};
			};
		};
 
		tpiu@ec032000 {
			compatible = "arm,coresight-tpiu", "arm,primecell";
			port {
				tpiu_in_port: endpoint {
				};
			};
		};
	};
};

6. 

6.<dt-bindings/gpio/gpio.h>
7.<dt-bindings/input/input.h>
8.<dt-bindings/interrupt-controller/irq.h>
来自“https://www.mywiki.cn/free6d1823/index.php?title=Hikey960_device_tree&oldid=44425”